Avionics systems are being implemented by running one or more applications (application(s)) on multi-core processor systems having an operating system, such as a Real-Time Operating System (RTOS). Some applications need to execute quickly for mission critical uses such as in aerospace systems, e.g. avionics.
The operating system may assign unique core(s) of a multi-core processor and one or more unique memory pool(s) of a multi-core processor system to each process of an application running on the multi-core processor systems. Each memory pool comprises one or more of each of the following: interconnects, cache memory pools, memory controllers, ranks of main memory, and banks of rank(s) of the main memory. Memory pools are further described in pending U.S. patent application Ser. No. 15/440,242 filed on Feb. 23, 2017 and entitled “Memory Partitioning for A Computing System with Memory Pools”, which is incorporated by reference herein in its entirety. Proper selection of memory pools and corresponding cores facilitates reduced memory access times, thereby yielding a substantial increase in speed at which an application is executed on the multi-core processor.
Not all combinations of core(s) and memory pool(s), however, provide enhanced application execution speed. Non-optimal combinations may slow application execution time which results in disadvantageous avionics system performance. Accordingly, there is a need to identify combinations of core(s) and memory pool(s) in multi-core processor computing systems to improve application execution speed on the system.